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Programm (als pdf)

 

8:30 - 9:30 Registrierung

9:30 - 9:45 Begrüßung

9:45 - 10:30 Eingeladener Vortrag 1

Design trends in wireline communication systems
Jörg Hauptmann, Richard Gaggl, Martin Clara

10:30 - 11:00 Poster Session und Kaffeepause

P1:
Algorithmus für eine automatisierte Designoptimierung eines zweistufigen Miller-Operationsverstärkers unter Verwendung von Submicron-CMOS-Transistor Modellen
Martin Haubeneder, Michael Sams, Timm Ostermann

P2:
Configurable Adaptive Mixed-Signal Test-Pattern Generator
Daniel Kolednik, Klaus Strohmayer

P3:
Test Work Flow and Specification for Physical Unclonable Functions
Christoph Böhm, Maximilian Hofer

P4:
Außer Konkurrenz: The Potato-Chip Project
Fitore Faiki, Clemens Humer, Dominik Epp, Alfred Fuchs

P5:
Schnelles FPGA-basiertes Bildaufnahme- und Verarbeitungssystem
Ylber Hasani, Ernst Bodenstorfer, Jörg Brodersen, Johannes Fürtler, Konrad Mayer

11:00 - 12:40 Morning Session

M1:
A High-Speed Operational Amplifier in 65nm CMOS Technology
Heimo Uhrmann, Horst Zimmermann

M2:
A Variable Gain Low Noise Amplifier for UWB 6–10 GHz Applications
Alena Djugova, Jelena Radic, Mirjana Videnovic-Misic

M3:
Second Order Effects in Multislope A/D Converters
Matvey Geldin, Andrea Fant, Johannes Sturm

M4:
A High Dynamic Range Transimpedance Amplifier in 40nm CMOS Technology
Mohammed Hassan, Horst Zimmermann

M5:
Temperature and Process Compensated Oscillator in 0.13µm CMOS IC Technology
Shravan Kumar Kada, David Astrom, Johannes Sturm

12:40 - 14:00 Mittagessen

14:00 - 14:30 Eingeladener Vortrag 2

Hochgeschwindigkeitsschaltkreise für Optoelektronik und Sensorik
Andreas Thiede, Ahmed Awny, Vadim Issakov, Nasir Uddin

14:30 - 15:30 Afternoon Session I

A1.1:
An FPAA and an Automatic Filter Design Technique for Self-Reconfigurable Hardware
Paul Farago, Peter Söser, Lelia Festila, Sorin Hintea, Gabor Csipkes, Doris Csipkes

A1.2:
System Level Robust Communication System Design using Extended System CAMS Building Block Library
Jiong Ou

A1.3:
Verifying Open Source CPU Cores Using Instruction Set Simulators in OVM Environments
Waqas Ahmed, Siegfried Brandstätter, Mario Huemer

15:30 - 16:00 Kaffeepause

16:00 - 17:20 Afternoon Session II

A2.1:
Efficiency Considerations and Component Selection for Low-Voltage Solar-Powered Converters
Miodrag Nikolic, Horst Zimmermann

A2.2:
Switched-Capacitor-Frontend Chip für Lawinenverschüttetensuchgeräte in einem 0.35 µm CMOS-Prozess
Lukas Zöscher, Robert Okorn

A2.3:
Optical Wireless Communication at 1.25Gbit/s with Integrated Receiver in 0.5µm BiCMOS Technology
Paul Brandl, Robert Swoboda, Wolfgang Gaberl, Horst Zimmermann

A2.4:
Proof of Concept for Mitigation of Aging Induced Degradation in Differential Circuits using Chopper Stabilization
Shailesh More, Florian Chouard, Michael Fulde, Doris Schmitt-Landsiedel

17:20 - 17:30 Ausblick Austrochip 2012